$ git clone https://github.com/andestech/nds-openocd

Then compile it (I enabled all the programmers supported by OpenOCD, but you just need aice)

$ ./bootstrap
$ ./configure --enable-internal-jimtcl --enable-maintainer-mode --disable-werror --disable-shared --enable-stlink --enable-aice --enable-jlink --enable-rlink --enable-vslink --enable-ti-icdi --enable-remote-bitbang --enable-usb-blaster --enable-presto --enable-osbdm
$ sudo make install

You need this OpenOCD config file:

$ cat openocd_nds32.cfg 
log_output iceman_debug0.log
debug_level 3
gdb_port 9902
telnet_port 9901
tcl_port 6666
source [find interface/nds32-aice.cfg]
source [find board/nds32_xc5.cfg]

gdb_target_description enable
gdb_report_data_abort enable
nds log_file_size 10485760
nds global_stop off
nds reset_halt_as_init on
nds boot_time 5000
nds reset_time 1000

Note: you need to edit /usr/local/share/openocd/scripts/interface/nds32-aice.cfg and use:

adapter_khz 12000

instead of 24000!

$ sudo openocd -f openocd_nds32.cfg -d3
Open On-Chip Debugger 0.10.0+dev-g47292a9c3 (2022-11-14-13:07)
Licensed under GNU GPL v2
For bug reports, read
	http://openocd.org/doc/doxygen/bugs.html
User : 91 1 options.c:60 configuration_output_handler(): debug_level: 3
User : 92 1 options.c:60 configuration_output_handler(): 
Debug: 93 1 options.c:184 add_default_dirs(): bindir=/usr/local/bin
Debug: 94 1 options.c:185 add_default_dirs(): pkgdatadir=/usr/local/share/openocd
Debug: 95 1 options.c:186 add_default_dirs(): exepath=/usr/local/bin
Debug: 96 1 options.c:187 add_default_dirs(): bin2data=../share/openocd
Debug: 97 1 configuration.c:42 add_script_search_dir(): adding /root/.openocd
Debug: 98 1 configuration.c:42 add_script_search_dir(): adding /usr/local/bin/../share/openocd/site
Debug: 99 1 configuration.c:42 add_script_search_dir(): adding /usr/local/bin/../share/openocd/scripts
Debug: 100 1 configuration.c:97 find_file(): found openocd_nds32.cfg
Debug: 101 1 command.c:147 script_debug(): command - log_output log_output iceman_debug0.log
Andes AICE-MINI v2.0.0
There is 1 core in target
JTAG frequency 12 MHz
<-- HW reset-and-hold failed. -->
<-- SW reset-and-hold failed. -->
<-- aice_issue_srst ERROR! -->
The core #0 listens on 9902.
ICEman is ready to use.